Lehrstuhl Kognitive Integrierte Sensorsysteme: TESYS

Technology and Design of Integrated Mixed-Signal Circuits and Systems (TESYS) (V2/Ü2)

Instructor: Prof. Dr.-Ing. Andreas König

Lab/Exercises: Prof. Dr.-Ing. Andreas König and research assistants

Consultations: During the lecture period every Monday, 13:00-14:00, 12/455, else according to bulletin announcement or personal appointment (koenig@eit.uni-kl.de)

Contents:

Qualification aims:

Knowledge of the required processes, methods, description approaches and tools for the computer-aided modelling, simulation and manufacturing of integrated analog and mixed-signal circuits
Mastery of the Cadence DFW II IC design system and a common manufacturing technology (CMOS, BiCMOS) and design-kit (mixed-mode, mixed-signal)
Overview of common analog and mixed-signal-circuits and building blocks, their properties, and their integration (layout design)
Ability of independent realisation of a design project or a subproject in the context of a larger group design (MPC)

Teaching contents:

Manufacturing technologies and -methods for integrated circuits (CMOS (bulk, SOI), BiCMOS)
Device spectrum, process variations, yield, tolerances and soft-faults
Principles of layout-design for analog and mixed-signal circuits (matched-layout)
Design methodology and tools of computer-aided design for integrated mixed-signal electronics (Hierarchical design, mixed-mode, mixed-signal, AHDLs)
Advanced device models (e.g., BSIM-models)
Enhancement of circuits & building blocks (References etc.)
Design techniques for applications-specific cells and blocks: selection, sizing, simulation, layout,extraction, post-layout simulation for application-specific operational amplifiers (OpAmp/OTA), Filters, AD/DA-converters, VCO etc.
Modelling, design and layout realisation of digital circuits as components in integrated mixed-signal electronics
Advanced issues : Noise, analog synthesis, testing, rekonfiguration, eigen- or self calibration, self-monitoring/-repair, adaptation

The respective contents will be treated within the two hours lecture. The lecture is complemented by a two hour computer exercise where, based on the Cadence DFW II design system and Austriamicrosystems 0.35um CMOS Technology, practical tool and design experience will be gathered. A particular feature is, that sizing information of amplifiers designed in this technology can be downloaded into a reconfigurable chip and system and instantly become amenable to measurement !

Excursions

Traditionally, for students of this course and its predecessors an excursion to a company is organized at the end of the teaching period. The excursion will give insight into industrial practice of design and manufacturing. Commonly, a peek in cleanroom facilities of common integrated circuit and sensor manufacturing technologies will be given by hosting companies. In previous years, ZMD, FhG IMS2, Austriamicrosystems, Thesys Erfurt, and IHP Frankfurt/O have been hosting institutions. In 2007, Naomi Sensitec, Mainz, hosted the course on September 6th.

A survey of company profile and activities was given followed by a round-trip of sensor manufacturing facilities, and a final discussion on opportunities for student internships or theses. More information can be found in the university magazine SPECTRUM, February 2008, p. 35. Negotiations with other hosting companies for 2008 and following years are in progress.

Since 2008, we are anually organizing an excursion to SENSOR + TEST in Nürnberg under the sponsorship of AMA organization. This year 2011, the bus excursion will be on 07. June, free of charge, enroll at ISE while still buss seats are free !

Another excellent opportunity to get deeper insight in uptodate developments of microelectronics is the annual Dresden Microelectronics Academy in Dresden. Find the outline and application for 2011 here !

Readings

Phillip E. Allen, Douglas R. Holberg, CMOS Analog Circuit Design, Oxford University Press, 2nd ed., 2002
R.C. Jaeger, T.N. Blalock: Microelectronic Circuit Design. McGrawHill, 2003, ISBN 007-232099-0
Kenneth R. Laker, Willy M.C. Sansen, Design of Analog Integrated Circuits and Systems, MacGrawHill, 1994.
R. Jacob Baker, Harry W. Li, David E. Boyce, CMOS Circuit Design, Layout, and Simulation, IEEE Press, 1998.
Hastings, The Art of Analog Layout, Prentice Hall, 2001
Jaeger, Introduction to Microelectronic Fabrication, Prentice Hall 2002
Geiger/Allen/Strader, VLSI Design Techniques for Analog and Digital Circuits
Grey/Meyer, Analysis and Design of Analog Integrated Circuits

Prerequisites:

Elektronik I + II , Elektrische Messtechnik I +II, basics of UNIX/LINUX

Associated courses :

Sensor signal processing

Following courses :

HEIS, Neurocomputing, Master project (Studien- oder Diplomarbeit)

Examination:

Oral examination based on semester project. In a computer-based accompanying lab, students become acquainted with employing the presented methods using Cadence DFW II. Topics for semester projects, as individual or group projects will be given to students, which shall be elaborated, documented, and presented. The projects focus on the design and implementation of an integrated analog or mixed-signal circuit employing a technology (currently Austriamicrosystems 0.35um CMOS technology)available via EUROPRACTICE foundry services. The work will be presented (20 min. slide presentation, get ISE ppt-style here), discussed, and assessed in the oral examination.

Selected semester projects :

Martin Hetterich	Design of a dedicated comparator	2007
Jürgen Hornberger	Design of a dedicated Miller-OpAmp	2007
Robert Freier	Design of a dedicated Miller-OpAmp	2007
Kai Lutz	Design of a dedicated Miller-OpAmp	2007
Shang Kuan	Design of a dedicated Miller-OpAmp	2007
Abhaya Chandra	Design of a Buffer Amplifier	2009
Mahesh Polakkaparambil	Analog Mux & Column Decoder for APS Matrix Readout	2009
Jiawei Yang	Multi-Project Sensor Chip Design - Global Pad Placement	2009
Ben Lutgen	Design of an Folded-Cascode-OpAmp in High-Voltage CMOS-Technology	2009
Amira Ghezal, Jad Halabi, Anand Joshy, and Kamal Baghirli	3-bit Flash Analogue to Digital Converter Design in 0.35 um CMOS Technology'	2022
Janis Krieger and Conner Cordruwisch	3-Bit Rail to Rail DAC Design and Layout in XFAB 0.35 um CMOS Technology	2023
Aaron Speicher	InAmp with external RG and offset compensation based on Miller type OpAmp	2023
Elias Biehl and Furkan Aktas	Front-To-Back Implementation of a 3-Bit Analog to Digital Converter in XFAB 0.35um CMOS Technology	2023

Course number: 85-651

Course materials :

For the course participants, lecture slides (ppt/pdf) and exercises (tutorials & tasks) based on Cadence DFW II are provided. The access information will be proliferated in the lecture. The materials are exclusively made available to the students of this course and can be subject to copyright of different holders without further explicit mentioning. Reprint of the course materials, dissemination of the course materials to third parties, and proliferation of the access information is prohibited without written consent of the course instructor, Prof. A. König, as well as copyright holders of the original materials donated for the purpose of teaching to a limited group.