Lehrstuhl Kognitive Integrierte Sensorsysteme: Low-Cost Vision Systems

Investigations on Integrated Low-Cost Image Processing and Recognition System Design

Subject:
Design considerations and VLSI-implementation of dedicated image processing and recognition systems in price sensitive application domains

Abstract:
In cooperation with our industrial partner the tasks of dedicated CMOS image sensor development, OCR system integration, and development of a flexible image processing and recognition system design environment were tackled in three subprojects. The result of the third subproject, the QuickCog-System, was commercialised in 1998 and is now available by our industrial partner (PHYTEC Sales Information).

Image acquisition for recognition systems imposes very different demands on sensor and resulting image quality in comparison to consumer applications, where image quality is subject to human evaluation. In the first subproject, implementation options for CMOS image sensor implementation were investigated under constraints as, e.g. area requirement, dynamic range, resolution, power consumption and readout rate. The aim of this effort was, to support the effective design of application specific image sensors and their integration with digital processing in a compact and competitive solution. A first sensor design was achieved in coordination with the aims of the second subproject.

Automated consumption meter readout is a subject of commercial interest, because a vast number of installed mechanical meters have to be read out manually today.

Visual readout by attachment of an embedded system comprising dedicated image sensor, processor, and transmission system as an add on to existing installed meters is an interesting alternative to the expensive replacement by electronical meters with remote readout. With regard to the underlying large numbers of potential installation sites, this problem is also a very nice instance of an application, where a dedicated implementation can compete with general purpose hardware concerning size and costs. In the third subproject the compact, cheap, and energy conserving implementation of a neural embedded system for this application was investigated. In a top down approach, several algorithmic solutions including a correlation scheme and a hierarchical neural approach were investigated and the best solution was subject to mixed-signal modelling and subsequent VLSI implementation. Exploiting the results of the first subproject, a dedicated CMOS image sensor was tailored to the application requirements. A prototype was manufactured and successfully tested.

The digital processor was synthesized from the Verilog description and the layout was in part generated in standard cell design style. A prototype OCR-chip could be manufanufactured according to the principal floorplan.

This work has been continued and with the chip a camera prototype was assembled. This served to build a first image acquisition and evaluation system for automated consumption meter readout task. The OCR algorithm also was improved with regard to scale, line width , and black/white inversion of different meter fonts. Currently, the correlation-based OCR algorithm runs on the QuickCog-System so that a PC-based QuickCog-demonstrator is available. This demonstrator serves as a feasibility study and baseline for a new VLSI integration effort to achieve the aspired low-cost integrated recognition system. The applicability of the designed sensor, especially of the chosen design parameters such as pixel count and pixel value resolution, was confirmed by the correct recognition results of the demonstrator system.
This work also serves as a research vehicle for the long term objective of developing a methodology for systematic and optimized integrated cognitive system design based on the QuickCog-System.

	Status:		concluded, duration 06/1997-10/1998
	Partner:		PHYTEC Messtechnik GmbH, Robert-Koch-Strasse 39, 55129 Mainz
	Financing:		PHYTEC Messtechnik GmbH, Robert-Koch-Strasse 39, 55129 Mainz
	Contact:		Prof. Dr.-Ing. Andreas König
	Contributors:		Jan Skribanowitz, Stefan Getzlaff, Jörg Schreiter, Michael Eberhardt, and Robert Wenzel
	Publications:
			Schreiter, J., Getzlaff, S., Fendrich, J., Klahr, K., König, A.: Systemstudie für ein integriertes Sensor/Prozessorsystem zur automatischen visuellen Ablesung von Verbrauchszählern. In Tagungsband Fachtagung Informations- und Mikrosystemtechnik, Magdeburg , S. 109-116, 25.-27. März, 1998.

			König, A., Skribanowitz, J., Schreiter, J., Getzlaff, S., Eberhardt, M., Wenzel, R.: Ein System zur schnellen Modellierung von Bildverarbeitungs- und Erkennungssystemen. in Tagungsband der Dresdner Arbeitstagung Schaltungs- und Systementwurf DASS'98, FhG IIS-EAS, Dresden, 26. Mai, 1998

			König, A., Eberhardt, M., Wenzel, R.: A Transparent and Flexible Development Environment for Rapid Design of Cognitive Systems . In the proceedings of the EUROMICRO'98 Conference, Workshop Computational Intelligence, Västeraas, Sweden, August 25-27, 1998

			Eberhardt, M., Wenzel, R., König, A.: Efficient Application of Neural Networks in a Self-Learning System for Visual Inspection. In Proc. of the Fourth Int. Workshop on Neural Networks in Applications NN'99, Magdeburg, Germany, pp. , March, 1999.

			Getzlaff, S., Schreiter, J., König, A.: Systematic Design of an Embedded Neural System for Automated Visual Consumption Acquisition. In Proc. of the 7th Int. Conf. on Microelectronics for Neural, Fuzzy, and Bio-Inspired Systems MicroNeuro'99, University of Granada, Spain, pp. 307-314, April 7-9, 1999.