Lehrstuhl für Entwurf Informationstechnischer Systeme
Chair of Electronic Design Automation
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Lehrstuhl für Entwurf Informationstechnischer Systeme
On these pages you find information about us [People], our research [Research] and our teaching [Teaching]. If you are a student, the below announcements will help you at the beginning of the semester to quickly access all needed information regarding upcoming courses.
News
+ + + Best Paper Award + + +
08-Nov-2018:
Our paper “A HW/SW Cross-Layer Approach for Determining
Application-Redundant Hardware Faults in Embedded Systems” published in Journal of Electronic Testing – Theory and Applications (Jetta) in January 2017 received the Best Paper Award. The award is granted by the IEEE Test Technology Technical Council and was presented to us at International Test Conference (ITC) in Phoenix Arizona (Nov. 1, 2018).
Information on exam registration is published on OpenOLAT.
Lecture Announcements
EIT-EIS-560-V-4
Verification of Digital Systems
(with class project: EIT-EIS-562-M-7)
| Tuesday Thursday | 13:45 - 15:15 13:45 - 15:15 | Room: 11-207 Room: 11-243 |
2 hours of lecture / 2 hours of assignments (5 ECTS credits) plus 3 ECTS class project (optional)
Start: Tuesday, October 23, 2018
EIT-EIS-571-V-4
Architecture of Digital Systems I
| Thursday Friday | 11:45 - 13:15 11:45 - 13:15 | Room: 11-243 Room: 11-207 |
2 hours of lecture / 1 hour of assignments (4 ECTS credits)
Start: Friday, October 26, 2018
EIT-EIS-573-V-4
Architecture of Digital Systems II
| Wednesday Thursday | 13:45 - 15:15 15:30 - 17:00 | Room: 11-207 Room: 48-210 |
2 hours of lecture / 1 hour of assignments
Start: Wednesday, October 24, 2018
EIT-EIS-521-L-7 (WS)
Embedded Systems Laboratory (Labor Digitaltechnik II)
| Tuesday | 14:00 - 17:00 | Room: 12-524 |
4 hours of laboratory (5 ECTS credits)
Start: Thursday, October 25, 2018, 15:30, Room: 48-210
Attendance is required to claim seat.
Registration is mandatory for this lab.
Seats are assigned on a first-come first-serve basis.
