Fachgebiet Entwurf Informationstechnischer Systeme (EIS)

Architecture of Digital Systems I

EIT-EIS-571-V-4
Thursday
Friday
11:45 - 13:15
11:45 - 13:15
Room: 11-243
Room: 11-207

2 hours of lecture / 1 hour of assignments (4 ECTS credits)

Start: Thursday, October 31, 2019

DOWNLOADS

For download material and further information please use OpenOLAT.(Access information for the course is given in class.)

Link to OpenOLAT

News

  • Changes to lecture and exercise times are regularly published on the OpenOLAT web page of this course

Content

This course addresses the fundamentals of computer architecture with focus on RISC processors. We will discuss

  • Data representation
    • Signed and unsigned fixed point numbers
    • Floating point numbers, IEEE 754 standard
  • Computer arithmetic
    • Algorithms
    • Sequential and parallel hardware implementations
  • Instruction set and machine language
    • Instruction set categories
    • Addressing modes
    • Assembler programming
  • Datapath and control
    • Hardware implementation of a processor
    • Control unit design, microprogramming
    • Exceptions
  • Instruction set parallelism
    • Pipelining
    • Superscalar and VLIW processors
    • Dynamic scheduling
  • Memory hierarchy
    • Caches
    • Virtual memory, page tables, TLB

Exercise

The exercise sessions are tutored by Dipl.-Ing. Christian Bartsch.

Homework assignments can be downloaded through OpenOLAT (see below).

Literature

  • Patterson/Hennessy: Computer Organization and Design - The Hardware/Software-Interface, Morgan Kaufmann, 2013, EIT 860/103
  • Hennessy/Patterson: Computer Architecture - A Quantitative Approach, Morgan Kaufmann, 2011, EIT 860/104.

Downloads

For download material and further information please use OpenOLAT.

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