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Application of Neurocomputing Systems: A Joined Teaching and Research Initiative

Subject:
Application of digital and analog neurocomputing systems with appropriate sensors to train diploma/master and doctoral students on features and existing restrictions of dedicated hardware implementations. This explicitly includes system extensions, mainly by programming of new algorithms and application systems. The objective of the project is to provide students, in addition to the theoretical teaching background  from the neurocomputing course, with expertise to effectively design HW/SW solutions for real-world problems in their following educational or professional work. Close cooperation with companies in the field gives the required proximity to practical challenges and state-of-the-art work in embedded and microsystems/MEMS design and application..

Abstract:
In cooperation with our respective industrial partners, neurocomputer systems where applied in student educational projects for intelligent system applications, mainly related to neural network application in sensor signal and image processing, e.g., for visual inspection tasks.  In some of activities, the QuickCog-System, was included in the work. The first expired activity, pursued from 1997 to 2001 at TU Dresden, focused on the SYNAPSE III neurocomputer, which is a PC -card based implementation employing the MA16-chip developed by Ramacher et al., Siemens AG. The board is complemented by libraries and emulation environment, so that in the students project, physical availability was not mandatory for project development. SynUseBase and required information was provide by MediaInterface GmbH, Dresden. Students developed several projects on Hopfield networks, backprogation networks and Kohonen´s Self-Organizing feature Map (SOM). These prjects were embedded as toolboxes in the QuickCog-System and for the SOM case, applications on vector quantization and data visualization could be demonstrated. The work of the best  project achieved a workshop publication (Bader, Pietsch) enlisted below. The activities at this stage of the teaching  project were restricted to previously acquisited data, i.e., no sensors were explictly involved in the project.

In current work, both digital and neural implementations are studied. For the digital case, a ZISC-system including a camera has currently become available. For the analog case, the Silimann chip of Silicann Technologies GmbH, Rostock, is applied based on the available evaluation system and training software:

  

The system was enhanced for a simple case study of real-time color classification by the implemented 10x6x10 network by an true color sensor from MAZeT, Erfurt. Here, one of the extension boards of our  wireless color sensor project was briefly adapted to that task:

 

In a simple set-up with a ring of white LEDs, avoiding the influence of spurious illumination, a simple case of color object presence or completeness detection was regarded. Here the idea of tablet blister completeness inspection motivated the investigation.

      

Training data for neural network training was acquisited based on the setup and several object and non-object presentations. With regard to the extensive manual effort, a rather low number of examples was collected and the work was limited to regarding only one ambient operating temperature, leaving the temperature compensation capabilities of the Silimann chip currently unused. making full use of the available hidden layer size, an application-specific 3x6x2 network was trained by appropriate parameter setting in the training environment:

 

The network weight data is consecutively downloaded to the Microcontroller´s EEPROM memory and used for pattern test. After satisfactorily testing the host-based training results on the Silimann chip, real-time classification experiments followed by sensor exposure to objects and non-objects. Satisfactory performance could be observed, employing an oscilloscope as output, however, time measurements are infeasible due to slow, manual object feeding and presentation.

           

Additional projects are in preparation. One of the objectives of following projects is the application of advanced learning techniques for the network weight definition, including more powerful gradient descent techniques and evolutionary computation approaches to evolve the neural network. Further, the extension of the host-based training to the inclusion of the chip in the learning loop (Chip-In-the-Loop-Learning, CHILL) is another major target of the next projects. CHILL allows the compensation of chip specific deviations by collective weight adaptation, which implictly improves yield and performance. Combinations of CHILL and advanced training techniques will follow. 

	Status:		running, duration 03/2006-03/2008
	Partner:		Silicann Technologies GmbH, Rostock
	Financing:		Company donations; self-funded
	Contact:		Prof. Dr.-Ing. Andreas König
	Contributors:		Aliye Otan Ebru, S. Bader, T. Pietsch, and numerous other course participants
	Publications:
			Aliye Otan Ebru, Presentation on Analog Neural Network Hardware for Color Classification
			Bader, S., Pietsch , T., König, A..: Implementing Neural Networks on SYNAPSE3 PC in QuickCog. In Proc. of the Fourth Int. Workshop on Neural Networks in Applications NN'99, Magdeburg, Germany, pp. 125-132, March, 1999.